PolyU Develops Quantum-Tunnelling Transistor to Overcome Chip Energy Barriers
August 31st, 2026 11:15 AM
By: Newsworthy Staff
A PolyU-led research team has created a tunnelling field-effect transistor using 2D nanomaterials, breaking the Boltzmann limit and enabling ultra-low-power, high-performance chips for AI and advanced electronics.
In a significant advancement for semiconductor technology, a research team at The Hong Kong Polytechnic University (PolyU) has engineered a novel tunnelling field-effect transistor (TFET) that overcomes the physical limits of conventional transistors. This breakthrough, published in the prestigious journal Science, could pave the way for energy-efficient computing and the next generation of AI chips.
Conventional transistors rely on thermionic emission, which requires a minimum gating voltage of 60 millivolts (mV). This limitation, known as the "Boltzmann limit," makes it physically impossible to achieve subthreshold swing (SS) values below 60 mV per decade at room temperature, restricting further improvements in energy efficiency and performance. The new TFET, however, utilizes quantum tunnelling to bypass this constraint, achieving SS values well below the 60 mV per decade limit.
Led by Prof. Jianhua Hao, Head of the Department of Physics and Materials and Chair Professor of Materials Physics and Devices at PolyU, the research team collaborated with the National University of Singapore, The Hong Kong University of Science and Technology, Peking University, and the Singapore University of Technology and Design. The team created an ultra-thin heterostructure of 2D bismuth and indium selenide alternating layers using pulsed laser deposition. By precisely controlling the layer structure, the normally semi-metallic bismuth transforms into a semiconductor in 2D form, allowing charge carriers to tunnel efficiently into indium selenide through quantum tunnelling.
The resulting TFET operates at room temperature on silicon substrates and requires a gate-voltage range of only 160 mV, far lower than the 800 mV typically needed. This device also resolves a challenge in experimental TFETs by delivering a high output current alongside an exceptionally high ON/OFF current ratio, which helps drive multiple downstream logic gates and diminish circuit delay.
Prof. Hao emphasized the importance of this breakthrough: "By adopting quantum tunnelling, our TFET breaks through this boundary, paving the way for ultra-low-power, high-performance integrated circuits essential for emerging AI chips and advanced semiconductor applications."
The implications are vast. For AI applications, which require massive parallel processing and energy efficiency, this technology could lead to more powerful and sustainable chips. For the semiconductor industry, it offers a pathway to continue scaling down transistors without hitting the energy wall. The research represents a fundamental advance that could reshape the future of electronics, from consumer devices to data centers.
Source Statement
This news article relied primarily on a press release disributed by Media Outreach. You can read the source press release here,
